The continuing trend towards expanding the capabilities of computer related products has raised significant issues. As products dependent on advanced electronics have become more complex, a larger number of semiconductor chips have been required. Moreover, there has been a demand to reduce the dimensions of these new sophisticated products. As such, a growing need has developed to utilize the space within the product's housing more effectively.
As with most computer related products, a predominant amount of space is allocated within the housing for wire traces and buses which couple semiconductor chips together. The reliance on printed wiring or printed circuit boards, particularly trace and bus wiring for linking semiconductor chips, has several shortcomings. Printed wiring or printed circuit boards spread out the chips in a plane, taking up a large amount of area.
Moreover, when coupling chips on a board, trace and bus wires must first be fabricated by an etching process to form interconnects. Conductive connections with the chips are then formed by permanently soldering the chips' pins to the wire buses. This method of linking chips is subject to a large number of manufacturing defects, particularly in the solder bonds. As such, the overall cost of the manufacturing process is increased high.
Further, each chip on a printed wiring or printed circuit board must rely on a pad within the chips to which a pin on a metal lead frame is bonded. This enables each input/output of the chip to interface with the remainder of the board. However, the wire bonding process used to connect the pad to the lead frame lowers the overall reliability of the chip. Additionally, the reliability of the boards themselves becomes an issue after repeated use. Because of the permanent connection between the chip and the board, the entire board, with its total cost, must be replaced when one chip fails.